
;*******************************************************************************
;
; memmap_def.cmm
; Lauterbach T32 Memory Map Definition File
;
; This file is autogenerated from memmap_def.c. Do not edit
;
;*******************************************************************************

global &RAMI_BASE &RAMI_SIZE &RAMI_LIMIT
&RAMI_BASE=0x00000000
&RAMI_SIZE=0x00020000
&RAMI_LIMIT=0x00020000
global &RAMI_CS
&RAMI_CS=0x00000006

global &RAMIDATA_BASE &RAMIDATA_SIZE &RAMIDATA_LIMIT
&RAMIDATA_BASE=0x04000000
&RAMIDATA_SIZE=0x00020000
&RAMIDATA_LIMIT=0x04020000
global &RAMIDATA_CS
&RAMIDATA_CS=0x00040006

global &FLASH_BASE &FLASH_SIZE &FLASH_LIMIT
&FLASH_BASE=0x20000000
&FLASH_SIZE=0x00800000
&FLASH_LIMIT=0x20800000
global &FLASH_CS
&FLASH_CS=0x0020000c
global &FLASH1_BASE
&FLASH1_BASE=0x20000000
global &FLASH_BLOCKSIZE
&FLASH_BLOCKSIZE=0x00010000
global &FLASH_BLOCKCOUNT
&FLASH_BLOCKCOUNT=0x00000080

global &RAME_BASE &RAME_SIZE &RAME_LIMIT
&RAME_BASE=0x28000000
&RAME_SIZE=0x00400000
&RAME_LIMIT=0x28400000
global &RAME_CS
&RAME_CS=0x0028000b

global &BOOT_BASE &BOOT_SIZE &BOOT_LIMIT
&BOOT_BASE=0x20000000
&BOOT_SIZE=0x00080000
&BOOT_LIMIT=0x20080000

global &IMAGE_BASE &IMAGE_SIZE &IMAGE_LIMIT
&IMAGE_BASE=0x20080000
&IMAGE_SIZE=0x00680000
&IMAGE_LIMIT=0x20700000

global &DELTA_REWRITE_BASE &DELTA_REWRITE_SIZE &DELTA_REWRITE_LIMIT
&DELTA_REWRITE_BASE=0x20080000
&DELTA_REWRITE_SIZE=0x00080000
&DELTA_REWRITE_LIMIT=0x20100000

global &DELTA_REWRITE_CODE_BASE &DELTA_REWRITE_CODE_SIZE &DELTA_REWRITE_CODE_LIMIT
&DELTA_REWRITE_CODE_BASE=0x20080000
&DELTA_REWRITE_CODE_SIZE=0x0002fffc
&DELTA_REWRITE_CODE_LIMIT=0x200afffc

global &DELTA_REWRITE_STAVER_BASE &DELTA_REWRITE_STAVER_SIZE &DELTA_REWRITE_STAVER_LIMIT
&DELTA_REWRITE_STAVER_BASE=0x200afffc
&DELTA_REWRITE_STAVER_SIZE=0x00000004
&DELTA_REWRITE_STAVER_LIMIT=0x200b0000

global &MAINCODE_BASE &MAINCODE_SIZE &MAINCODE_LIMIT
&MAINCODE_BASE=0x20100000
&MAINCODE_SIZE=0x00600000
&MAINCODE_LIMIT=0x20700000

global &NVD_BASE &NVD_SIZE &NVD_LIMIT
&NVD_BASE=0x20700000
&NVD_SIZE=0x00100000
&NVD_LIMIT=0x20800000
global &NVD_BLOCKSIZE
&NVD_BLOCKSIZE=0x00010000
global &NVD_BLOCKCOUNT
&NVD_BLOCKCOUNT=0x00000010

global &RAM_BASE &RAM_SIZE &RAM_LIMIT
&RAM_BASE=0x28000000
&RAM_SIZE=0x003d0000
&RAM_LIMIT=0x283d0000

global &SRAM_BASE &SRAM_SIZE &SRAM_LIMIT
&SRAM_BASE=0x283d0000
&SRAM_SIZE=0x00018000
&SRAM_LIMIT=0x283e8000

global &SRAM2_BASE &SRAM2_SIZE &SRAM2_LIMIT
&SRAM2_BASE=0x283e8000
&SRAM2_SIZE=0x00010000
&SRAM2_LIMIT=0x283f8000

global &NONCACHEABLE_RAME_BASE &NONCACHEABLE_RAME_SIZE &NONCACHEABLE_RAME_LIMIT
&NONCACHEABLE_RAME_BASE=0x283f8000
&NONCACHEABLE_RAME_SIZE=0x00008000
&NONCACHEABLE_RAME_LIMIT=0x28400000

global &PERFLOG_BASE &PERFLOG_SIZE &PERFLOG_LIMIT
&PERFLOG_BASE=0x283fffc0
&PERFLOG_SIZE=0x00000020
&PERFLOG_LIMIT=0x283fffe0

global &PUD_BASE &PUD_SIZE &PUD_LIMIT
&PUD_BASE=0x283fffe0
&PUD_SIZE=0x00000020
&PUD_LIMIT=0x28400000
global &SLEEP_REASON_PTR
&SLEEP_REASON_PTR=0x283ffff0
global &NONCACHEABLE_RAME_WO_PERFLOG_PUD_SIZE
&NONCACHEABLE_RAME_WO_PERFLOG_PUD_SIZE=0x00007fb0

global &DD_SAFE_RAM_BASE &DD_SAFE_RAM_SIZE &DD_SAFE_RAM_LIMIT
&DD_SAFE_RAM_BASE=0x283fffb0
&DD_SAFE_RAM_SIZE=0x00000010
&DD_SAFE_RAM_LIMIT=0x283fffc0
